Methods

Si-NW growth

Silicon nano-wires were synthesized in a two-step growth process via V LS mechanism. At first, the gallium layer of various thicknesses was deposited onto soda-lime glass and Si/SiO₂ substrates via thermal evaporation. SiO₂ layer of 1 nm thickness was used as a barrier to prevent possible diffusion of Ga into Si. The thickness of the Ga layer was varied between 7.5 and 100 nm.

The samples were then loaded into an RF-PECVD reactor with radio frequency of 13.56 MHz and left for 4 h. Hydrogen gas was introduced into the chamber, while the substrate, coated with Ga layer, is being heated up to the growth temperature. Prior to introduction of the precursor gas, hydrogen plasma was created for 5 min in order to remove possible contamination and gallium oxide layer from the substrate. Si-lane (SiH₄) was used as Si source. Gas flow rates, RF power, chamber pressure and deposition duration were process variables that have been investigated in detail and will be reported elsewhere.

Fabrication of bistable memory device

For the fabrication of a bistable memory device, glass substrate was used. Al contacts were deposited by thermal evaporation. Two silicon nitride (Si₃N₄) dielectric layers of 20 nm each were deposited in a PECVD system, sandwiching Si-NWs between the bottom and top electrodes. Si-NWs were grown for 30 min from 100-nm Ga catalyst layer at 400°C. After the Si₃N₄/Si-NW/Si₃N₄/Al/glass structure was fabricated, the second layer of Al contacts was evaporated to finalize the device. The device characteristics were tested by I-V and data retention time measurements.

Fabrication of Schlocky diode

Sin W-based Schlocky diodes were fabricated by growing the Si-NWs directly on glass substrate from 50 nm Ga at 400°C for 20 min with subsequent evaporation of both Al contacts on top of the nano-wires. The device characteristics were tested via I-V measurements.

Fabrication of solar cells

During solar cell fabrication, a glass substrate covered with transparent conductive oxide (TCO) layer (the details of the layer will be reported elsewhere) was utilized. Si-NWs were grown on top of this layer from 50 nm Ga at 400°C for 40 min. Nano-wires for the solar cell were grown using additional phosphine in the reaction chamber for n-type doping of the nano-wires. After the nano-wire growth Al dots were evaporated for top contact.